New research has categorized all existing fault detection and localization strategies for grid-tied PV inverters. The overview also provides a tabular classification of different types of component failures and their possible causes.
April 14, 2022
An international research group has performed a comprehensive analysis of all failure modes and prone component failures in grid-tied solar inverters, providing a comprehensive overview of all available detection and localization techniques.
In particular, the overview offers a tabular classification of different types of component failures and their possible causes and describes different approaches to data preparation and feature mining. It also categorizes all fault detection and location (FDL) techniques in a tabular manner.
The review includes a list of all wear defects such as bond wire root cracks, solder fatigue, die attach degradation and delamination, aluminum reconstruction, substrate cracks, corrosion, electrochemical migration, ionic contamination and time dependent dielectric breakdown. It also categorizes catastrophic failures such as latch-up, melting of bond wires, avalanche breakdown, electrostatic discharge, and secondary breakdown.
In addition, the work analyzes the impact of these failures on the performance of solar panels and the inverter itself, as well as a description of both model-based and model-free FDL approaches and other FDL techniques. Model-free methods coupled with artificial intelligence (AI) proved to be the most efficient to quantify the performance parameters. “In addition, AI-based techniques offer superior detection and localization capabilities compared to model-based techniques,” the scientists explained. “However, one bottleneck towards AI is that there are very few real-time implementations of AI-based techniques.”
Her work was featured in the newspaper Overview of Fault Detection Approaches for Grid Connected Photovoltaic Inverters recently published in e-Prime – Advances in Electrical Engineering, Electronics and Energy. The research group includes scientists from Jamia Millia Islamia University in India, Brno University of Technology in the Czech Republic and Aalborg University in Denmark. “Future work is further motivated to include inductance estimation in current emulators as part of new error detection approaches and improve efficiency in high-power operation,” they concluded.
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